Latching digital PWM – good feature or bad feature

 

This from a discussion in the Digital Power Electronics Control Group on Linkedin 

‘I was wondering if you could explain what you mean by “…ensuring that the PWM does not latch at the switching speed (very important for wide bandwidth)”. Isn’t the PWM comparator by nature a latch? Are you implying for best performance one should not use PWM shadow registers but rather do ” immediate” PWM updates?’

Latching digital PWM – good feature or bad feature?

Hamish from ELMG Digital Power

‘D. – I am not implying that latching is necessarily completely bad. Latching does have some uses as it provides another place in the system where you can reduce the effect of “aliasing in time” on transients. That said if you use a latching PWM then it is clear that you add delay. Whether this matters for your control depends on the bandwidth aim you have and whether you have designed a system that has low margin due to its power converter. But generally we always use our PWMs wide open with no latching delay to minimise the phase we get. We sample faster than the switching frequency and use the PWM as a down sampler. It means you need to take care of the “aliasing in time” elsewhere and be careful about intermod product magnitude from other non linearities in the loop – low pass filters are required along with a bit of modulation know how. Very doable and looks like magic when you need more bandwidth.’

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